Conventionally, in view of improvement in performance efficiency of a transistor, a SOI technique of using a single-crystal silicon layer provided on an insulating layer for forming a semiconductor device has been attracting attention, and for example, many attempts to form a MOSFET (metal oxide semiconductor field-effect transistor) on a SOI substrate have been made.
Types of a MOSFET formed on a SOI substrate are classified into fully depleted SOI (FD SOI) with a relatively thin SOI layer and partially depleted SOI (PD SOI) with a relatively thick SOI layer, depending on the difference in thickness of the SOI layer. Of these types, the fully depleted SOI can suppress the leakage current between the source and drain but its parasitic resistance is increased by the reduced thickness of the SOI layer. Therefore, the fully depleted SOI is suitable for configuration of a logic circuit but not suitable for high-power circuit configuration. On the other hand, the partially depleted SOI has characteristics opposite to those of the fully depleted SOI. Therefore, the partially depleted SOI is suitable for high-power circuit configuration but is not suitable for configuration of a logic circuit. Accordingly, a SOI corresponding to circuit configuration is to be selected.
Recently, because of higher packing density and multi-functionality of semiconductor devices, a circuit including components (electronic devices) suitable for the fully depleted SOI and components suitable for the partially depleted SOI mounted on a single substrate, that is, so-called mixed loading circuit, has been increasingly demanded and development of a hybrid substrate having a SOI layer with partially different thickness has been conducted.
Moreover, for the purpose of reducing power consumption of semiconductor devices, many attempts have been made to mount a CMOS (complementary MOS) transistor or the like, which is a combination of the above-described MOSFETs, on a SOI substrate. Also in such cases, attempts to form a CMOS transistor and a large-capacity memory such as a DRAM (dynamic random access memory) on the same substrate (mixed loading LSI) have been made in order to cope with very high-speed and broadband data transfer. However, since a DRAM is not easily mounted on a SOI substrate because of its structure, fabrication of a partial SOI substrate in which only a part of a single-crystal silicon substrate where a CMOS transistor is mounted is a SOI substrate has been demanded.
In view of such backgrounds, a technique of forming a mask layer on the surface of a single-crystal silicon substrate, then implanting oxygen ions and performing heat treatment, thus manufacturing a SOI substrate having a SOI layer with partially different thickness, has been proposed, for example, in JP-A-2003-124305.
Also, a technique of combining etching and selective epitaxial Si growth (SEG) or the like to form a SOI substrate only at a part of a single-crystal silicon substrate, thus realizing mixed loading of a logic circuit and a DRAM cell, has been disclosed on a web site.
(http://www.toshiba.co.jp/about/press/2002—06/pr_jl1201.htm)
Moreover, a technique of forming an ion blocking mask on the surface of a single-crystal silicon substrate and then implanting oxygen ions, thus manufacturing a semiconductor substrate in which a SOI substrate is formed only in an area where the mask has not been present, has been proposed in JP-A-2003-197882.
However, in the technique described in the above-described JP-A-2003-124305, a mask layer is formed, then ion implantation and heat treatment are performed, and the mask layer is removed after that. Therefore, the degree of surface oxidation during the heat treatment varies depending on the presence/absence of the mask layer, raising a problem that flatness of the surface of the semiconductor substrate cannot be maintained.
The technique disclosed on the above-described web site includes a complex process, and it also has a problem that handling of a boundary between a single-crystal silicon layer newly formed by selective epitaxial Si growth and the original silicon dioxide layer and single-crystal silicon layer is complicated.
In the technique described in the above-described JP-A-2003-197882, oxygen ions are implanted only in the area where the mask has not been present. However, when it is assumed that the existence density of silicon atoms in the silicon crystal is 100, the existence density of silicon atoms in the silicon dioxide is 44, and therefore the volume expands to approximately 2.27 times (100/44 times) when the silicon is oxidized into silicon dioxide. Therefore, the technique has a problem that damage such as cracking occurs in the circumferential part of the silicon dioxide layer.